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Tag Archives: GATE-GATE-CS-2006

Consider these two functions and two statements S1 and S2 about them int work1(int *a, int i, int j) {     int x = a[i+2];     a[j]… Read More
Given two arrays of numbers a1, a2, a3,…an and b1, b2, .. bn where each number is 0 or 1, the fastest algorithm to find… Read More
Consider the following C-function in which a[n] and b[m] are two sorted integer arrays and c[n + m] be another integer array. void xyz(int a[],… Read More
Suppose we have a O(n) time algorithm that finds median of an unsorted array. Now consider a QuickSort implementation where we first find median using… Read More
Consider the following recurrence: Which one of the following is true? (A) T(n) = (loglogn) (B) T(n) = (logn) (C) T(n) = (sqrt(n)) (D) T(n)… Read More
A set X can be represented by an array x[n] as follows: Consider the following algorithm in which x,y and z are Boolean arrays of… Read More
An implementation of a queue Q, using two stacks S1 and S2, is given below: void insert(Q, x) {    push (S1, x); }     void… Read More
Let T be a depth first search tree in an undirected graph G. Vertices u and n are leaves of this tree T. The degrees… Read More
Consider the following graph: Which one of the following cannot be the sequence of edges added, in that order, to a minimum spanning tree using… Read More
Station A needs to send a message consisting of 9 packets to Station B using a sliding window (window size 3) and go-back-n error control… Read More
Two computers C1 and C2 are configured as follows. C1 has IP address and netmask C2 has IP address and netmask… Read More
Station A uses 32 byte packets to transmit messages to Station B using a sliding window protocol. The round trip delay between A and B… Read More
Consider a new instruction named branch-on-bit-set (mnemonic bbs). The instruction “bbs reg, pos, label” jumps to label if bit in position pos of register operand… Read More
A CPU has a five-stage pipeline and runs at 1 GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch… Read More
A CPU has a cache with block size 64 bytes. The main memory has k banks, each bank being c bytes wide. Consecutive c −… Read More

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