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Hardware Description Language

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  • Difficulty Level : Easy
  • Last Updated : 20 Jul, 2022
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The concept of a hardware description language as a medium for design capture was first introduced in the1950s, but wide adoption by the design community did not start until after 1985. Historically, the development of software programming languages stimulated the evolution of HDLs. One example, among many, is the programming language APL [Ive62] which was used as a form of design entry for a logic automation
system developed at IBM in the early 1960s. Researchers later used the notational conventions of APL at the University of Arizona to design AHPL (A Hardware Programming Language) [Hil74]. Since its introduction in the early 1970s, AHPL was hardly used in non-academic applications but served as an effective teaching tool [Hil87] in classroom environments. In the three decades starting from 1960 many HDLs were introduced including DDL[Dul69], ISPS[Bar81], and Zeus[Lie83]. However, the use of these languages rarely exceeded research and academic applications.

What is HDL?

In the history of Digital computers, various notations have been developed for capturing the logical behavior of digital circuits at different levels of abstraction. Boolean equations, timing charts, state transition tables, schematics, and hardware description languages are examples of such notations. Basically, a hardware description language is a set of notations, similar to software programming languages, used for modeling the logical function of digital circuits and systems. Compared to alternate forms of design capture, it has been shown, that the use of HDLs shortens the design cycle and yields more robust realizations. Many concede that without HDLs, the design of today’s complex circuits would not be possible in a reasonable amount of time. Also, HDL  can be used as an input to a variety of analysis and synthesis tools. Similar to a software programming language where the target machine code is hidden from the programmer, HDLs are independent of any particular target circuit technology.

Purpose of HDLs:

HDLs allow for behavioral, register transfer, gate, and switch level logic providing designers with the ability to define levels in detail. Behavioural level logic allows for a set of instructions executed sequentially, register transfer level logic allows for the transfer of data between registers, driven by an explicit clock and gate level logic, which defines the individual gate level logic. Similar to the relationship of HTML and CSS to web development, Verilog/VHDL has a similar relationship to FPGAs and other configurable logic devices. HDLs can be used to design and describe the layout of digital systems from simple flip-flop memory units to complex communications protocols.

 Example / Structure of HDL code:

1 entity Circuit_1 is
2     Port ( a : in  STD_LOGIC;
3            b : in STD_LOGIC;
4            out1 : out STD_LOGIC);
5 end Circuit_1;
6 architecture Behavioral of Circuit_1 is
8 begin
9 out1 <= ( a and b );
10 end Behavioral;
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