GATE | GATE-CS-2017 (Set 1) | Question 56

A cache memory unit with capacity of N words and block size of B words is to be designed. If it is designed as direct mapped cache, the length of the TAG field is 10 bits. If the cache unit is now designed as a 16-way set-associative cache, the length of the TAG field is ______ bits. 

Note: This questions appeared as Numerical Answer Type.

(A)

12

(B)

14

(C)

16

(D)

18

Answer: (B)

Explanation:

Formula:

cache size=N words

No. of bits to address cache size =log₂ N

Block size=B words

No. of bits to address block size =log₂ N

No of blocks in cache=N/B

No. of bits  to represent blocks =log₂ (N/B)

No. of sets in cache=(N/B)/16

No. of bits to represent sets=log₂ (N/B)/16

For direct map cache,

Tag    10

Cache line log2 (N/B)

Block offset   log2 B

For  associative map cache,

Tag k

Cache line log2 (N/B)/16

Block offset log2 B

Calculation:

10 +log₂ (N/B)=k+log₂ (N/B)/16

10 +log₂ (N/B)=k+log₂ (N/B)/16-log₂ 16

10 =x-4

x=14, So no. of tag bits for 16-way set associative cache are14 bits.

Quiz of this Question
Please comment below if you find anything wrong in the above post

My Personal Notes arrow_drop_up

Save